decoder造句
31) ID Instruction Decoder. This unit is capable of decoding up to 3 instructions per cycle.
32) Then the system structure, the implement of video matrix switch and decoder were discussed.
33) An instruction decoder based on CPLD and AT 89 C 51 is designed in this paper.
34) Compared with FPGAs, this PLD that has new SRAM-based on architectures can realize complex state machine and decoder more effectively in dynamic reconfigurable system.
35) On the other hand, a low complexity LDPC decoder was given. The proposed decoder not only has low computing complexity but also converges very fast (about 5 iterations is sufficient).
36) A global optimization algorithm (GOA) for parallel Chien search circuit in Reed-Solomon (RS)(255,239) decoder is presented.
37) VLSI design and implementation of loop filter for AVS high - definition video decoder paper.
38) The algorithm of this paper employs three coding rate . It comprises two parts, coder and decoder.
39) The system in this paper is compartmentalized to be three parts:Main Controller, Matrix Switcher and Terminal Decoder, and some interrelated knowledge about video image is introduced.
40) The invention discloses an interframe forecasting coding method, a decoding method, a coder, a decoder, a sub-pixel interpolation processing method and a sub-pixel interpolation processing device.
41) The hardware implementation of video coder and decoder is the precondition to process and transmit the digital video, so it is important to research the video process system based on the DSP.
42) Encoding instruction decoder for decoding command signals, and finally by the drive circuit to drive the implementation of circuit operation to achieve a variety of commands.
43) When playing through the decoder to restore the six channel playback.
44) The location of a start code prefix can be used by a decoder to identify the beginning of a new NAL unit and the end of a previous NAL unit.
45) For the detected error words by the LDPC decoder, the characteristics of code bits reliability information is investigated.
46) In this paper, a novel high-density address decoder architecture is proposed to avoid memory array's lateral conducting current in reading and programming mode.
47) This decoder can decode data with varible code rate and frame length.
48) The chapter five shows mixer and decoder code program flow chat.
49) The schematic for the DTMF decoder in the figure below. Again you can use a combination of wire wrapping and soldering. Part placement is not critical.
50) Hardware implementation for the all - erasure RS decoder is proposed, including the finite field arithmetic operation units.
51) This paper describes a new decoder, the phase stability and no pull-in time, and gives the measurement results.
52) Propose the ordered sphere decoder so that it can process the constellation with any shape and quicken the decoding time.
53) Circuit design by infra - red coding circuit, infrared decoder circuit and unlock the keyboard and display circuit.
54) Second, it adopts the multi-pass word graph search strategy and uses Uni-prune and2.5-prune techniques in the first stage of the decoder, which dramatically increase the speed of the decoder.
55) The decoder circuit is also easy to construct. You will have to physically wire (using alligator clips for instance) the TONE OUT pinout from the generator to the TONE IN pinout of the decoder.
56) This paper designs a new H. 264/ AVC decoder architecture which is optimized in deblocking filter and reconstruction and improving the decoding speed efficiently.
57) The task is based on ST's SDTV channel decoder solution with a highly integrated single-chip fully digital QAM demodulation STV0297.
58) Since this decoder has high error-correcting speed and regular structure, it may apply to data transmission and storage to decrease error rate.
59) Within the error correction capability of an error correction decoder(32) comprised in the radio apparatus(3) the radio apparatus(3) searches for a better antenna or antenna combination.
60) The design of two-dimensional optical orthogonal code fiber delay line encoder and decoder, and the ...
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