EEPROM造句
1) EEPROM was programmed with temperature calibration beforehand.
2) EEPROM is an important MOS memory and its role also can't be neglected.
3) Firmware program was also compiled and downloaded to EEPROM by I2C.
4) The EEPROM programmable technology in CPLDs can't be used in dynamic reconfigurable system.
5) With flash memory, also a type of EEPROM, the contents of the whole memory array, or of a portion of the memory, can be erased in one step, in contrast to the traditional, full-featured EEPROM.
6) One of Analog block , EEPROM, High - speed IO layout experience is preferred.
7) Electrically erasable programmable read-only memory (EEPROM) is mainly applied to information memory such as intelligentized IC card, single chip microcomputer, etc.
8) Experimental on - board EEPROM device write AT 24 C 08 visit.
9) Lockable EEPROM becomes ROM when locked additional security for unchanging battery data.
10) FLASH/EEPROM is a kind of read-only memory that is widely used in automobile and domestic appliance.
11) Software encryption has been realized by using EEPROM in the paper.
12) The application of series EEPROM has become an important component of SOC in the embedded systems.
13) Serial EEPROM has many advantages, such as little culbage, cheap cost, few connected wires.
14) Unlike an EEPROM , it is not necessary to poll the device for a ready condition since writes occur at bus speed.
15) The chips are CY 7 C 64613 chip, EEPROM chip and RS 232 interface chip.
16) EEPROM can be an electric erasable , power - fail without loss of data after the memory.
17) The output voltage of the charge pump nuclear is changed by the adjusting circuit, which makes the voltage suit with the operation voltage of EEPROM.
18) All the real - time data is stored and protected in the EEPROM of GC 1318.
19) The first involves using a microcontroller in combination with nonvolatile memory , such as EEPROM.
20) Realize the interface between PCI9054 and the PCI bus, including the bus arbitration, read and write of the registers, the configuration of the EEPROM, the DMA transfer, interrupt response and so on.
21) Via serial interface, adjustment for each LD / LDD and storage of adjusted data in external EEPROM are executed.
22) The configuration files of the controlling FPGA are stored in a serial EEPROM.
23) This paper briefly introduced the feature of PCI protocol slave mode interface chip PCI9052 and illustrated the advertent items when configuring the EEPROM.
24) The design of the system has its own separate watchdog and EEPROM memory circuit, therefore it can improve system reliability.